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Embedded-Debug-Time-Challenge

Embedded Debug Time Challenge

Introduction

Embedded development has many activities like board bring-up, device driver development, RTOS or kernel bring up and finally giving the board to the application team for further development. An embedded engineer spends close to 40% of the time debugging the development work. Most of the firmware development gets debugged only after the board is available. This delays the development and board brings up time leading to unpredictable schedule delays and overall project schedule variance. How can the debug time be reduced? and schedule of the overall embedded be better managed?

There are various ways of doing so.

  1. Early Firmware Development with the older reference design.
  2. Early Firmware Development with protocol Exerciser  

Firmware Development using the older reference design

This is the most commonly used approach in product development. In this approach, the older reference board which was earlier completed or working in various products is used as its proven board and the New Firmware development is done using the older reference design when the new board is ready the already developed firmware and the latest hardware are tested.

Firmware Development using Protocol Exerciser Models

Using Protocol Exerciser Model is a new innovative way to do Firmware development.  In this approach, the Protocol Exerciser Model is used instead of the new board.  The firmware engineer does the complete Firmware development and tests the firmware on the Protocol Exerciser Model. Later when the interface board is ready the Protocol Exerciser is replaced. This allows the firmware engineer to be confident about the firmware code 

Some of the protocol exercisers available in the market are as follows

I3C Protocol Analyzer and Exerciser 

 I2C/SPI Protocol Analyzer and Exerciser

  • Previous Introduction to Logic Analyzer
  • Next How to Select the Right Probes for Debugging?

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