JTAG Protocol Exerciser and Analyzer
JTAG Protocol Analyzer (PGY-JTAG-EX-PD) are the Protocol Analyzers with multiple features to capture and debug communication between host and design under test. PGY-JTAG-EX-PD is the leading instrument that enables the design and test engineers to test the respective JTAG designs for its specifications by configuring the PGY-JTAG-EX-PD as Master/Slave, generating JTAG traffic and decoding the JTAG protocol decode packets.
PGY-JTAG-EX-PD is the leading instrument that enables the design and test engineers to test the JTAG designs for its specifications by configuring PGY-JTAG-EX-PD as master/slave, generating JTAG traffic with error injection capability and decoding of JTAG Protocol packets.
The product features are as follows:
- Supports JTAG frequencies of up to 25MH
- Simultaneously generate JTAG traffic and Protocol decode of the Bus
- JTAG Master Capability
- Variable JTAG Data speeds and Duty cycle
- User-defined TCK & TDI Delays
- Continuous streaming of protocol data to the host computer to provide a large buffer
- A timing diagram of Protocol decoded bus
- Listing view of Protocol activity
- Error Analysis in Protocol Decode
- Ability to write exerciser script to combine multiple data frame generation at different data speeds
- USB 2.0/3.0 host computer interface
- API support for automation in Python or C++