PGY-UHS II SD/SDIO UHS II Protocol Analyzer

UHS II Protocol Analyzer(PGY-UHS II SD/SDIO) is the Protocol Analyzer with multiple features to capture and debug communication between host and design under test. PGY-UHS-II Protocol Analyzer supports FD156 and HD312 data rate. The innovative active probe has minimum electrical loading on device under test (DUT) and captures protocol data without affecting the performance of DUT. PGY-UHS II protocol analyzer allows streaming of protocol data from PGY-UHS II Protocol Analyzer to host system (using USB3.0 or GbE interface). Comprehensive decoding of data, protocol tests, and error analysis enables verification of communication between UHS II host and device.

PGY-UHS II SD/SDIO UHS II Protocol Analyzer

PGY-UHS II Protocol Analyzer allows Design and Test Engineers to test and debug SD UHS-II Interface triggering on command, response, data or CRC errors. PGY-UHS II Protocol analyzer instantaneously provides decoding of CCMD, DCMD, MSG, DATA and its arguments. The Analytics feature offer graphical representation of command, response, and data and frequency of operation for the acquired duration.

The product features are as follows:

  • Continuous monitoring and streaming of protocol data to capture elusive events (more than 30GB data capture)
  • Protocol tests of captured data for protocol integrity, DCMD, CCMD, MSG and DATA
  • Instantaneous display Protocol activity while he PGY-UHS II is capturing the Protocol data allowing almost live analysis of protocol activity
  • Hardware based protocol aware trigger capability enables capturing specific events
  • Trigger on CRC error conditions allow capturing infrequent error events
  • User can identify the anomalies by decoding command and response argument
  • Analytics provides analysis of acquired protocol data by plotting command, response, data and frequency of operation over acquired time
  • Decoding of device registers for easy analysis
  • Filter feature allows you to view specific packets in decoded protocol packets
  • Search for specific events in protocol activity
  • Easy to use software user interfaces reduces the learning curve of protocol analysis
  • Software is designed to handle long duration capture and display the decoded data without demanding extensive resources in host computer
  • Insertion of markers in protocol activity helps in correlating the input digital signal with Protocol Activity
  • Trigger out signal for any specific protocol event allows triggering of other instruments such as oscilloscope
  • Interface to host system using USB3.0 or Gigabit Ethernet interface
  • Flexibility to upgrade the hardware firmware using GbE interface provides easy field up gradation of firmware
  • Decoded data packets can be exported to CSV file for further analysis


Interfaces Supported SD4.0 (UHS-II), FD156 and HD312, SDIO
Protocol Decode CCMD, DCMD, MSG, DATA, Arguments,
Device registers
Data Decode Supported
Protocol Test Protocol Integrity, CRC Errors, Timing values,
Data CRC Errors, Reserved commands
Storage Capability Continuous streaming of protocol activity
upto 30GB
Capture Mode Manual Run/Stop, Time specific
Trigger Actions Capture data and/or trigger out signal
Host Machine Minimum Requirements Microsoft Windows® 8, Windows 7, 16GB of RAM;
Storage with at least 50 GB HDD space for the
storing the acquired data. Display with resolution
of at least 1024×768


PGY-UHS II Protocol Analyzer provides USB3.0 and GBe interface for host connectivity. PGY-UHS II software runs in host machine enables configuration of PGY-UHS II hardware for UHS II protocol analysis storage.

UHS II Interposers

Prodigy Technovations provides UHS II fixture /interposer. This allows user to probe UHS II Signals to monitor the protocol between host and device.

Comprehensive Protocol Analysis

PGY–UHS II Software provides industry best protocol analysis capabilities. Easy to use interface reduces the protocol analysis time. Time stamped view of protocol decode listing provides easy view of protocol activities between host and device. At click of a button user can get decode of argument of Response from the device. Decoding of registers provides detail information on devices. Analytics features quickly provide insight into protocol activity without going through the complete protocol activity.

Powerful Decide capabilities Registers

PGY-UHS II Protocol Analyzer quickly decodes the UHS II register and displays register filter name. These decode tables allow identify the host and device setting being set and quickly debug it. Above image displays the Generic capabilities and settings between host and device.


Data Packet Analysis

PGY-UHS II automatically identified if data transfer is FD156 and HD512 mode. PGY-UHS II will decode data commands and identifies, if data is in HD and FD mode and captures data. Display of captures can be viewed for each command. Data block is displayed as below:

Software will validates CRC values and highlights in red color, for any CRC failure. Data is displayed iin HEX and ASCII format for each block.


PGY-UHS II offers analytical feature displays time stamped packets of host, device and data exchange in a time domain view. This allows user to look at protocol activity traffic between the host and device.

User can export the Protocol decoded to txt file for documentation and further analysis in a user environment.

Ordering Information
The ordering information is as follows:

  • PGY- UHS II UHS II SD/SDIO Protocol Analyzer
    (Shipment includes Hardware, software CD, one set probe, USB3.0 and Ethernet Cable, Power Adopters, UHS II interposer)
  • Warranty:
    Hardware and software carries warranty of one year.
    Probes are covered three months warranty for any manufacturing defects.
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