UFS 4.0 Protocol Analyzer
Product
Overview
Datasheet
Presentation
Application
Notes
PGY-UFS4.0-PA, UFS Protocol Analyzer is the industry-first working and tested UFS4.0 Protocol Analyzer. It offers protocol data capture and debugging of data across MPHY, UniPro, and UFS protocol layers. It allows for instantaneous decoding of UFS, UniPro, and MPHY layers with the flexibility to correlate decoded data across these protocol layers. PGY-UFS4.0-PA supports PWMG1 to HSG5B data rates and two TX, and two RX lane decode. The active probe has minimum electrical loading on the device under test (DUT) and captures protocol data without affecting the performance of DUT. PGY-UFS4.0- PA Protocol Analyzer supports two-lane data. Comprehensive on the fly decoding of UniPro & UFS data enables validation of communication between UFS host and device.
PGY-UFS4.0-PA Protocol Analyzer allows Design and Test Engineers to obtain deep insight into UFS host and device communication. MPHY/UniPRO/UFS packet-based triggering allows specific protocol data capture and analysis. PGY-UFS Protocol analyzer instantaneously provides decoding of UFS, UniPro, and MPHY layers with a correlation to MPHY, UniPro, and UFS layers.
UFS 3.0 Protocol Analyzer Datasheet
Key features
- Supports version MPHY 4.0, UniPro 1.8, and UFS version 2.1/3.1
- Supports PWM G1 to G7 and HS G1,2,3,4 A and B Series · Supports one/two data lanes (2 TX and 2 RX)
- Flexibility to capture very large data using continuous streaming of Protocol data to host computer
- Hardware-based circular buffer
- Flexibility to decode selected data from 8GB Buffer
- Solder down active probe provides high signal fidelity
- Decoding at MPHY, UniPro, and UFS layer
- Trigger-based on MPHY, UniPro, and UFS layer packet content
- Supports triggering in PWM and HS data rate speeds
- Trigger out a signal at the trigger event allows the triggering of other instruments such as an oscilloscope
- Interface to host system using USB 3.0 or Gigabit Ethernet Interface
- Flexibility to upgrade the hardware firmware using the GbE interface provides easy field up-gradation of FPGA firmware
- Decoded data packets can be exported to a text file for further analysis
- PGY-UFS 3.0-PA Protocol Analyzer is lightweight and can be deployed for on-site/ field tests
PGY-UFS3.X-PA supports PWMG1 to HSG4B data rates and two TX, and two RX lane decode. The active probe has minimum electrical loading on the device under test (DUT) and captures protocol data without affecting the performance of the DUT. PGY-UFS3.X-PA Protocol Analyzer supports two-lane data. Comprehensive decoding of UniPro & UFS data on the Fly enables validation of communication between UFS host and device.
PGY-UFS3.X-PA Protocol Analyzer allows Design and Test Engineers to obtain deep insight into UFS host and device communication. MPHY/UniPRO/UFS packet-based triggering allows specific protocol data capture and analysis. PGY-UFS Protocol analyzer instantaneously provides decoding of UFS, UniPro, and MPHY layers with a correlation to MPHY, UniPro, and UFS layers.
Solder down active probes allows probing of the MPHY test points. This allows the design and test engineers to capture UFS traffic between the host and UFS memory with high signal fidelity. Today’s test engineers need to test the use case scenarios in their labs that mimic real-life use cases. The PGY-UFS3.X-PA, UFS Protocol Analyzer has been designed to enable engineers to closely monitor and analyze the traffic between the host and the device while executing the various use case scenarios.
Windows-based protocol analysis software provides the industry’s best protocol correlation between UFS to UniPro and MPHY layers. Time correlation between the different protocol layers significantly reduces debug time of designs. The floating window design of this software allows engineers to view the UFS view, UniPro view, and MPHY view on different computer monitors and automatically correlate the UFS packets to the MPHY layer. This makes analysis very easy while analyzing the gigabytes of Protocol information.
Test Setup
PGY-UFS3.X-PA UFS Protocol Analyzer provides USB 3.0 and Gbe interface for host computer connectivity. High-speed host connectivity enables continuous streaming of protocol data to host HDD and storage for a long period. The software offers multi-view such as MPHY view, UniPro view, and UFS View. Each view lists the respective protocol packets and their details with a correlation of each layer for easy debugging. The lightweight Analyzer is easy to carry during field visits.
Equalizer and Memory
PGY-UFS3.X provides flexibility to the set TX and RX CTLE and DFE equalizer to address reflection and poor SI signals while probing the MPHY signals. This helps in reducing the error decoding of packets. A newly introduced hardware-based circular buffer provides the flexibility to continuously capture the protocol data and analyze the data in circular buffer size. Users can set triggers on the circular buffer and capture the protocol data at specific events.
UFS Protocol Layer Decode
PGY-UFS3.X-PA Software can display each UFS packet parameter in a listing window. Right-click lists all the packet parameters for user selection. Users can color code the fonts or background color for easy identification of each UFS packet.
PACP And Unipro View
PGY-UFS3.X-PA Software separates the PACP packets in a separate view for easy analysis of power mode change packets and links to UniPro packets. Users can view the MPHY states stall, prepare, and sync information in UniPro view apart from the user selection for L_Data and AFC/NACK Packet details.
Comprehensive Protocol Analysis Using Multi-View
PGY-UFS-PA UFS Protocol Analyzer provides USB 3.0 and Gbe interface for host computer connectivity. High-speed host connectivity enables continuous streaming of protocol data to host HDD and storage for a long period of time. The software offers multi-view such as MPHY view, UniPro view, and UFS View. Each view lists the respective protocol packets and their details with a correlation of each layer for easy debugging.
PGY Protocol Analyzer’s easy-to-use interface reduces the protocol analysis time. Time-stamped view of protocol decode listing provides an easy view of protocol activities between the host and the device. At a click of a button, the user can view the decode of each packet and the intended function. Floating window software architecture allows the user to view each protocol layer on separate monitors for easy debugging. Autocorrelation of each selected packet from UFS to MPHY layers simplifies the debug activity
Error Events, Search, and Filter
PGY-UFS3.X-PA Software does the live decode and lists all the events. The list of events is shown in this picture. Users can easily note the errors in captured protocol data. In large buffer capture, it takes extremely difficult to locate the errors. But PGY-UFS3.X-PA software simplifies this by listing events while decoding the captured data. Search and Filter allows you directly locate the error events or UFS or UniPro or PACP packet in the protocol listing windows. Filter-in and Filter-out make it easy to view the data of interest
in the protocol listing window.
Key Specifications
Specifications
Data Rates Supported | PWM G1 to G7, High Speed Gear 1, Gear 2, Gear 3 and Gear 4, Rate A and B, Gear 5 Rate A and B |
Link width | Configurable for 1TX/1RX or 2TX/2RX |
Probes | Solder Down Active Probes |
Protocol Decode | UFS, MPHY and UniPro layers |
Trace Capture Size | Supports Continuous streaming of Protocol data to Host computer SSD/HDD. Tested For 30GB of Trace Depth |
Trigger | Based MPHY, UniPro, UFS Packets |
Front Panel Connectors | Interface for Active probes. Trigger in/out SMA connectors |
Interface for Host Computer | USB3.0 and Gigabit Ethernet interface |
Host Computer Requirements | Windows 7/8.0/8.1/10 64bit operating System. It supports a RAM of minimum 8GB, but the product would give a faster response for a 16GB. The minimum storage capacity of 1GB should be available in the hard disk drive. User can use more storage based on trace storage requirement Display resolution of the monitor is 1024x768, Host computer should support USB30 or Gße interface. |
Dimension | (W x H x D) (20.5X5X25) cms |
Weight | Approx. 2.5Kg |
Power Requirement | 12V, 3A DC Power Supply (AC/DC Supplied along with Analyzer) |
Trigger Specifications
| Stack | Protocol Analyzer | Packet Type |
|---|---|---|
| Link Start-up Sequence |
(TRG_UPROO)
(TRG UPRO1)
(TRG UPRO2)
|
|
| UniPRO | PHY Capability Adapter Packets (PCAP) |
PACP PWR reg
PACP_PWR_cnf
PAC_Cap_ind
PACP Cap_EXT1 ind
PACO EPR ind
PACP TestMode_req
PACP_GET_cnf
PACP SER req
PACP SET_cnf
PACP TEST_Data_0
PACP_TEST_Data_1
PACP TEST_Data_2
PACP TEST Data 3
|
| Data Link Packets |
SOF
EOF
EOF_ODD
EOF_EVEN
COF
AFC/NAC
Traffic class 0/Traffic class 1 |
|
| UFS | UFS Layers Packets |
NOP IN
Commands
Task Management Request
Task Management Response
Ready To Transfer
Ready to Transfer |
Solder Down Probe Tips
Probing the UFS signal is one of the key challenges in reliable UFS protocol decode. In most of the DUT, test points are located close to each other without enough space to solder the probe tips. Prodigy Technovations offers three types of 14 Gbps Probe tips which provide flexibility to choose the probe tips to meet the need. P5021-L and P5021-L-WE Probe tips have isolation resistors that can be changed based on the signal strength at test points. This helps in reducing reflections while accessing the test point and maintaining the signal integrity. The passive equalizer in P5021-L-WE helps in maintaining the differential impedance between the lane. If test points are easily accessible, then the P5021 probe tip can be used to probe the test points.
