Everything you need to know about SPMI Protocol & debugging SPMI Protocol
What is SPMI Protocol?
SPMI (System Power Management Interface) is a MIPI (Mobile Industry Processor Interface) standard with 2-wire synchronous serial, bidirectional interface that connects the integrated Power Controller(PC) of a System on- Chip (SoC) processor system with one or more Power Management Integrated Circuits (PMIC) voltage regulation systems.
What are the benefits of MIPI SPMI?
SPMI has a wide range of applications that are spread across industries that needs better Power Management. SPMI is used in Smartphones, Wearables, other portable electronic devices. Smartphones & Wearables uses SPMI for controlling power of sensors. High-end smartphones already have multiple devices in the designs & can require up to 20 signal lines. Each of these having independent power pins can cause issues. Similarly, most portable electronic devices, would need a power management interface to optimize the energy consumption and reduce-pin count.
How to debug MIPI SPMI Protocol?
SPMI Protocol Analyzer (PGY-SPMI-EX-PD) is the Protocol Analyzer with multiple features to capture and debug communication between host and design under test. PGY-SPMI-EX-PD is the leading instrument that enables the design and test engineers to test the SPMI designs for its specifications by configuring PGY-SPMI-EX-ED as master/slave, generating SPMI traffic with time variation and error injection capability and decoding SPMI Protocol packets.
Features of Prodigy SPMI Protocol Analyzer
Multi-Domain View
Multidomain View provides the complete view of SPMI Protocol activity in single GUI. User can easily setup the analyzer to generate SPMI traffic using a GUI or script. User can set different trigger conditions from the setup menu to capture Protocol activity at specific event and decode the transition between Master and Slave. The decoded results can be viewed in timing diagram and Protocol listing window with autocorrelation. This comprehensive view of information makes it industry best, offering an easy to use solution to debug the SPMI protocol activity. Continuous streaming protocol activity to host system HDD/SSD ensures seamless roll mode operation without the need to recapture data when DUT/s are set to different states thereby saving test times.
Exerciser
PGY-SPMI-EX-PD supports SPMI traffic generation using GUI and Script. User can generate simple traffic generation using the GUI to test the DUT. Script based GUI provides flexibility to emulate the complete expected traffic in real world including error injections. In this sample script user can generate SPMI traffic as below.
Script line #1: Reg Write to the slave with USID 06
Script line #2: Reg Read to the slave with USID 06
Script line #3: Ext Reg Write to the slave with USID 06
Script line #4: Ext Reg Read to the slave with USID 06
Timing Diagram & Protocol Listing View
Timing view provides the plot of SCKL and SDATA signals with bus diagram. Overlaying of Protocol bits on the digital timing waveform will help easy debugging of Protocol decoded data. Cursor and Zoom features will make it convenient to analyze Protocol in timing diagram for any timing errors.
Protocol window provides the decoded packet information in each state and all packet details. Selected frame in Protocol listing window will be auto correlated in timing view to view the timing information of the packet.
Powerful Trigger Capabilities
PGY-SPMI-EX-PD supports simple trigger capabilities. Analyzer can trigger on any of the Protocol packets such as Reg Write, SLEEP or WAKE UP. Advanced Trigger provides the flexibility to monitor Multiple trigger conditions and can set multiple state trigger machine.
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