UFS Protocol Analyzer

UFS Protocol Analyzer (PGY-UFS3.X-PA) is the Protocol Analyzer with multiple features to capture and debug communication between host and design under test. PGY-UFS3.X-PA, UFS Protocol Analyzer, value based analyzer in its class, offers capture and debug of data across MPHY, UniPro and UFS protocol layers. It allows for instantaneous decoding of UFS layer, UniPro layer and MPHY layer with flexibility to correlate decoded data across these protocol layers.

UFS Protocol Analyzer

PGY-UFS3.X-PA Supports PWMG1 to HSG4B data rates and two TX, two RX lane decode. The active probe has minimum electrical loading on device under test (DUT) and captures protocol data without affecting the performance of DUT. PGY-UFS3.X-PA protocol Analyzer can support two lane data. Comprehensive decoding UniPro & UFS on the Fly enables validation of communication between host and device.

PGY-UFS3.X-PA, UFS Protocol Analyzer allows Design and Test Engineers to obtain deep insight into UFS host and device communication. MPHY/UniPro/UFSpacket based triggering allows specific protocol data capture and analysis. PGY-UFS3.X-PA Protocol analyzer instantaneously provides decoding of UFS layer, UniPro layer and MPHY layer with a correlation to MPHY, UniPro and UFS layer.

 

Features

The product features are as follows:

  • Supports version MPHY 4.0, UniPro 1.8 and UFS version 2.1/3.1
  • Supports PWM G1 to G7 and HS G1,2,3,4 A and B Series · Supports one/two data lanes (2 TX and 2 RX)
  • Flexibility to capture very large data using continuous streaming of Protocol data to host computer
  • Hardware based circular buffer
  • Flexibility to decode selected data from 8GB buffer
  • Solderdown active probe provide high signal fidelity
  • Decoding at MPHY, UniPro and UFS layer
  • Trigger based on MPHY, UniPro, UFS layer packet content
  • Supports triggering in PWM and HS data rate speeds
  • Trigger out signal at trigger event allows the triggering of other instruments such as oscilloscope
  • Interface to host system using USB3.0 or Gigabit Ethernet Interface
  • Flexibility to upgrade the hardware firmware using GbE interface provides easy field upgradation of FPGA firmware
  • Decoded data packets can be exported to txt file for further analysis
  • PGY-UFS3.0-PA Protocol Analyzer is light weight and can be deployed for on-site/ field tests

 

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