The Discovery logic analyzer series, PGY-LA-EMBD has the built-in capability to debug I2C protocol, SPI protocol, UART, and many other serial protocols. This is a PC-based logic analyzer designed for professional engineers. The Discovery logic analyzer is used to debug embedded systems, the logic analyzer not only reduces the workbench area but also allows it to have a very small form factor and can be used to debug failures in the field. The protocol decode capabilities are designed to debug the logic and protocol issues faced by embedded design teams in the consumer, industrial, home automation, health, and education sectors.
PGY-LA-EMBD is an industry-first logic analyzer in its category which enables engineers to debug timing problems and perform simultaneous protocol analysis of I2C, SPI, UART or I3C, SPMI, and RFFE and also has support for CAN, CAN FD in embedded designs. This enables designers to debug circuit-level and system-level problems quickly.
PGY-LA-EMBD offers 1GS/Sec asynchronous (timing) data and 100Mhz synchronous (state) data capture which makes it an ideal debug tool to address digital design problems. Designers can now easily analyze setup and hold time issues, glitches, and synchronous data activities apart from analyzing protocol issues.
Current generation embedded designers need to collect data from multiple interfaces such as I2C, SPI, UART, I3C, SPMI, RFFE, CAN, and, CAN FD and process it to achieve optimal performance of their design. Embedded design teams need to take timely action to meet the intended objectives of the product. PGY-LA-EMBD decodes I2C, SPI, UART or I3C, SPMI, RFFE, and CAN, CAN FD bus and displays the protocol activity with time stamp information. PGY-LA-EMBD is an ideal instrument to debug hardware and embedded software integration issues and optimize software performance.
Multiple markers enable smart delta measurements which are key to designers. Zoom enables users to look at specific areas of the signal.
16 channels with Protocol and Logic Analysis capability.
1GS/Sec Timing (Asynchronous) Analysis.
100MHz State (Synchronous) Analysis.
Simultaneous Protocol Analysis of I2C-SPI-UART and I3C-SPMI-RFFE and CAN, CAN-FD.