PCIe Protocol Analyzer Data Sheet

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The PGY-PCIeGen3/4-PA is a PCIe Protocol Analyzer that supports protocol analysis up to PCIe Gen4 speeds. PCIe design and test engineers can easily capture and record traces at 2.5, 5.0, 8 and 16GT/s at a specific event and obtain error reports instantaneously at an affordable price. This enables the design and test engineers to reduce the development time and address the time-to-market needs. PCIe Gen4 data is captured using interposers between the root complex and endpoint (Device under test). PCIe Gen4 interposers support. PCIe Gen4 Protocol Analyzer’s software provides complete decode and error analysis of Transaction Layer Packets (TLPs), data link Layer Packets and with LTSSM information.